CS 220 Bentley College CIS Department

Fall 1999

Module 2

A Simple CPU

Reading: Chapters 6 and 7

Goals: To understand the operation, organization, and instruction set of a simple computer.

Overview of Module:

(1) Introduction to Little Man Computer (level 1).

(2) Concept and contents of a computer instruction set (level 1-2)

(3) Organization of real computer CPU (level 1); Registers (level 1); Buses (level 1-2)

(4) The CPU fetch-execute cycle (level 2-3)

(5) The use of the computer's instruction set to create simple programs (level 2-3)

(6) Classification of Instructions (level 1-2)

Topics:

(1) The Little Man Computer organization, components, and instruction set; use of the instruction set to create simple programs

(2) Design of a simple CPU and correlation to components of the LMC

(3) Concept of registers in a CPU

(4) Implementation of each LMC instruction, in terms of the step-by-step tasks performed by the LM. The use of registers in the CPU to implement the LMC instuctions; the Fetch/Execute instruction cycle. Equivalency of the tasks performed by the LM to the F-E cycle.

(5) Simple buses; the movement of data between different parts of the CPU

Proficiency::

You should be able to explain the organization of a CPU and the role of each component at a Bloom 2 knowledge level. This means that you should be able to explain the operation of a CPU in which the components differ slightly, but not in a fundamental way, from those described in the book.

You should be able to read and interpret simple programs written in LMC instruction code (level 2+). You should, with sufficient time and sufficient guidance, be able to write very simple programs in LMC code (level 2+ - 3).

You should be able to explain in detail the operation of an instruction for which you have been given the fetch-execute cycle (level 2). You should be able to create an F-E cycle for an instruction that is a slight variation on the ones studied, given the task that the instruction is to perform.(level 2+ - 3).

You should be able to discuss the components and characteristics of a bus (level 1-2-), and consider CPU performance in the context of a particular bus design (level 2+). You should be able to identify relevant tradeoffs in different bus designs (level 2)

Typical questions might be:

• Identify and explain the function of the important registers in a CPU (level 1).

• If I produce a CPU design which provides two parallel ALUs, what affect would that have on system performance compared to a single ALU design running at the same clock speed? (level 2). From what you know of the CPU instruction set, what are the limitations of such an approach? (level 2+ - 3)

• What are the different types of lines that would ve found on a bus? (level 1). If a particular bus multiplexes the data and address lines, what are the effects on system performance? Explain your answer. (level 2)

• Given a particular F-E cycle, different from those that you have already seen, create a table that shows the values stored in each relevant register at each step of the cycle, and explain what the instruction does. (level 2).

• Write a program in LMC code that produces the absolute value of the difference between two numbers. (level 3)

• Trace through a particular program, and state what it does in one sentence. (level 2 - 2+). What are the final values found in particular memory locations? (level 2) What are the final contents of particular registers? (level 2)

Also look through the exercises at the end of chapters 6 and 7 for specific examples.